How to use the simulator

Add parts with the buttons above the canvas: switches (inputs), lamps (outputs) and the eight gate types. Switches are named A, B, C … and lamps X, Y, Z … in the order you add them.
Move parts by dragging them. With the keyboard, tab to a part and use the arrow keys (hold Shift for bigger steps).
Connect them. Every part has its output on the right and its inputs on the left. Drag from an output dot to an input dot. On a touch screen or with the keyboard, tap or press Enter on the output, then on the input. An output can feed any number of inputs, but each input takes one wire; connecting a new wire replaces the old one.
Flip the switches by tapping them, or with Enter or Space. Wires carrying a 1 turn amber and lamps light up. The matching row of the truth table is highlighted.
Delete a part or a wire by selecting it and pressing Delete, or with the “Delete selected” button.

Your circuit is saved in this browser, so it is still there when you come back. “Copy link” puts the whole circuit in the address, which you can send to someone else or keep as a bookmark. The ready-made circuits in “Load a circuit” are a good place to start.

The gates

A logic gate computes a Boolean function of its inputs. NOT and the buffer take one input; the others take two. The small circle on NAND, NOR, XNOR and NOT is the symbol for inversion.

Gate	Output is	Expression	00	01	10	11
AND	1 only when both inputs are 1	$A \cdot B$	0	0	0	1
OR	1 when at least one input is 1	$A + B$	0	1	1	1
NAND	NOT AND: 0 only when both inputs are 1	$\overline{A \cdot B}$	1	1	1	0
NOR	NOT OR: 1 only when both inputs are 0	$\overline{A + B}$	1	0	0	0
XOR	1 when the inputs differ	$A \oplus B$	0	1	1	0
XNOR	1 when the inputs are equal	$\overline{A \oplus B}$	1	0	0	1
NOT	the opposite of its input	$\overline{A}$	A = 0 → 1		A = 1 → 0
Buffer	the same as its input (in hardware it restores signal strength)	$A$	A = 0 → 0		A = 1 → 1

The column headings are the two inputs $AB$ . Unconnected inputs in the simulator read as 0, which is a convenient default but not how real chips behave: a floating CMOS input can read as either value, so in hardware every input must be tied to something.

Truth tables and expressions

For a circuit without feedback, every output is a fixed function of the switches, so the simulator can list it for every combination of inputs: the truth table, with the first switch as the most significant bit. It shows up to 6 switches (64 rows).

It also writes each lamp’s value as a Boolean expression, by walking back from the lamp through the gates it is wired to. The expression mirrors the circuit exactly, gate for gate, so it is usually not the simplest form. Copy it into the Boolean algebra calculator to simplify it, or design in the other direction: start from a truth table, minimise it with the K-map solver, and build the minimal circuit here.

Worked example: a full adder

Load “Full adder” from the menu. It adds three bits, $A$ , $B$ and a carry-in $C_\text{in}$ , and produces a sum bit $S$ and a carry-out $C_\text{out}$ . The simulator produces this table:

A	B	Cin	Cout	S	A + B + Cin
0	0	0	0	0	0
0	0	1	0	1	1
0	1	0	0	1	1
0	1	1	1	0	2
1	0	0	0	1	1
1	0	1	1	0	2
1	1	0	1	0	2
1	1	1	1	1	3

Read $C_\text{out}\,S$ as a two-bit binary number and it is the count of 1s among the inputs, which is what adding three bits means. The sum is $S = A \oplus B \oplus C_\text{in}$ , 1 when an odd number of inputs are 1, and the carry is $C_\text{out} = AB + C_\text{in}(A \oplus B)$ . Chain 32 of these, each carry-out feeding the next carry-in, and you have a ripple-carry adder for 32-bit numbers.

Worked example: a multiplexer

“2-to-1 multiplexer” passes input $A$ through when the select switch $S$ is 0 and input $B$ when it is 1. The simulator writes its output as Y = A ∧ ¬S ∨ B ∧ S, which is $A\overline{S} + BS$ . Multiplexers are how a processor chooses between values, such as which register feeds the adder.

One gate is enough

NAND is functionally complete: every Boolean function can be built from NAND gates alone. Tie a NAND gate’s inputs together and it becomes NOT. Follow it with a NOT and it becomes AND. NOT both inputs first and it becomes OR, by De Morgan’s law $\overline{\overline{A}\cdot\overline{B}} = A + B$ . Load “XOR from four NANDs” to see the classic four-gate XOR. NOR is complete too. Chips are often built mostly from NAND and NOR gates, because in CMOS they need fewer transistors than AND and OR.

Feedback and memory

Wire a gate’s output back into an earlier gate and the circuit can remember. Load “SR latch (NOR)”: two NOR gates, each feeding the other. Turn S on and off: $Q$ becomes 1 and stays 1. Turn R on and off: $Q$ becomes 0 and stays 0. With both switches off, the latch holds whichever value it had, so the same inputs give different outputs depending on what happened before. That is why the simulator shows no truth table for circuits with loops. Latches like this are the basis of flip-flops, registers and static RAM.

The simulator settles a loop by re-evaluating the gates until nothing changes. Some loops never settle: a single NOT gate feeding itself flips forever. In hardware that is a ring oscillator, and the simulator warns you when it finds one. Setting S and R to 1 together forces both latch outputs to 0, the “forbidden” state; switching both off at once then leaves the result depending on which gate is faster.

What this simulator does not model Every gate here switches instantly, so there are no propagation delays, glitches or race conditions. Real gates take time, which is what limits clock speeds and why a K-map sometimes needs an extra, redundant group to remove a hazard. There are also no clocks, tri-state outputs or analogue effects. For timing, use a hardware description language such as Verilog or VHDL with a simulator.

Common mistakes

Leaving an input unconnected. A gate with a missing wire still computes, using 0 for that input, so a half-wired circuit can look as if it works for some rows. Check the expression: an unconnected input shows up as a 0.
Confusing XOR and OR. They differ only when both inputs are 1. A half adder’s sum needs XOR; with OR, 1 + 1 would give sum 1.
Reading the bubble as decoration. The small circle inverts. NAND is not AND, and the output side of an XNOR is the opposite of XOR.
Expecting a truth table from a latch. A circuit with feedback has state, so it is described by a state table or a timing diagram, not a truth table.

To check a hand-made truth table, use the truth table generator; for the algebra of gates, the Boolean algebra explainer.

References

C. E. Shannon, “A symbolic analysis of relay and switching circuits”, Transactions of the AIEE 57(12), 1938. doi:10.1109/T-AIEE.1938.5057767
D. M. Harris and S. L. Harris, Digital Design and Computer Architecture, 2nd ed., Morgan Kaufmann, 2012. Chapters 1–3 cover gates, combinational logic and latches.
C. Petzold, Code: The Hidden Language of Computer Hardware and Software, 2nd ed., Microsoft Press, 2022. Builds an adder and memory from relays and gates.
“Logic gate”, Wikipedia.

Logic gate simulator: build and test circuits online